Transformable Dependence Graphs for Accelerator Modeling

The transformable dependence graph (TDG) is a trace-based representation of program execution for modeling specialization techniques, generally programmable accelerators. It combines semantic information about program properties (through a Program IR) and low-level hardware events (in the uDG) in a single representation. This representation can capture both program transformations like vectorization or if-conversion and hardware specialization techniques like compound functional units (FUs) and spatial execution. These are both expressed as graph transformations, enabling the modeling of execution time, power, and energy of core+accelerator heterogeneous architectures.

We are planning to release the gem5 based framework soon. The initial release will likely be a virtual machine image (as the framework was developed as a research prototype). Depending on interest, we may package into an easier to use tool.

Relevant Papers:

• Analyzing Behavior Specialized Acceleration. Tony Nowatzki, Karthikeyan Sankaralingam, ASPLOS 2016.
• A Graph-Based Program Representation for Analyzing Hardware Specialization Approaches. Tony Nowatzki, Venkatraman Govindaraju, Karthikeyan Sankaralingam. Computer Architecture Letters, 2015.

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