Recent Talks by Multiscalar People
[2004]
[2003]
[2002]
[2001]
[2000]
[1999]
[1998]
[1997]
[1996]
[1995]
2004
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Use Based Register Caching with Decoupled Indexing
J. Adam Butts
The 31th International Symposium on Computer Architecture (ISCA-31), 2004.
2003
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Exploiting Value Locality in Physical Register Files
Saisanthosh Balakrishnan
36th International Symposium on Microarchitecture (MICRO-36), Dec. 3-5, 2003. -
Single-Chip Multiprocessors: The Rebirth of Parallel Architecture
Guri Sohi
Keynote at the Conference on Parallel Architectures and Compilation Techniques (PACT 2003), Sept. 29, 2003 -
Parallelism in the Front-End
Paramjit Oberoi
The 30th International Symposium on Computer Architecture (ISCA-30), June 9-11, 2003.
2002
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Characterizing and Predicting Value Degree of Use
Adam Butts
35nd International Symposium on Microarchitecture (MICRO-35), Nov 2002.
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A Quantitative Framework for Automated Pre-Execution Thread Selection
Amir Roth
35nd International Symposium on Microarchitecture (MICRO-35), Nov 2002.
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Dynamic Dead-Instruction Detection and Elimination
Adam Butts
10th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-X), Oct 2002.
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Microprocessors: 20 Years Back, 10 Years Ahead
Guri Sohi
University of Toronto, March 2002
2001
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Speculative Multithreading: from Multiscalar to MSSP
Guri Sohi
keynote at the MTEAC workshop, December 2001 -
Speculative Multithreaded Processors
Guri Sohi
given at Intel, August 2001. -
Execution-based Prediction Using Speculative Slices
Craig Zilles
The 28th Annual International Symposium on Computer Architecture (ISCA-28), July 2001
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Speculative Data-Driven Multithreading
Amir Roth
7th International Symposium on High Performance Computer Architecture, Jan 2001.
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A Programmable Co-processor for Profiling
Craig Zilles
7th International Symposium on High Performance Computer Architecture, Jan 2001.
2000
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Speculative Multithreaded Processors
Guri Sohi
invited talk given at the HiPC 2000 conference, Dec 2000. -
A Static Power Model for Architects
Adam Butts
33nd International Symposium on Microarchitecture (MICRO-33), Dec 2000.
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Register Integration: A Simple and Efficient Implementation of Squash Reuse
Amir Roth
33nd International Symposium on Microarchitecture (MICRO-33), Dec 2000.
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Microprocessors -- 10 Years Back, 10 Years Ahead
Guri Sohi
Birck Distinguished Lecture, Purdue University, September 2000. -
Multiple Threads and Future-Generation Architectures
Guri Sohi
given at Sun Microsystems, July 2000. -
Understanding the Backward Slices of Performance Degrading Instructions
Craig Zilles
The 27th Annual International Symposium on Computer Architecture (ISCA-27), June 2000
1999
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The Use of Multithreading for Exception Handling
Craig B. Zilles
32nd International Symposium on Microarchitecture (MICRO-32), Nov 1999.
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Speculation and Future-Generation Computer Architecture
Guri Sohi
given at Cadence Design, October 1999.
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Improving Virtual Function Call Target Prediction via Dependence-Based Pre-Computation
Amir Roth
International Conference on Supercomputing (ICS), June 20-25, 1999.
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Effective Jump-Pointer Prefetching for Linked Data Structures
Amir Roth
26th International Symposium on Computer Architecture (ISCA-25), May 2-4 1999.
1998
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Understanding the Differences Between Value Prediction and Instruction Reuse
Avinash Sodani
31th International Symposium on Microarchitecture (MICRO-31), Nov-Dec 1998
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Dependence Based Prefetching for Linked Data Structures
Amir Roth
8th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-VIII), Oct 1998.
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An Empirical Analysis of Instruction Repetition
Avinash Sodani
8th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-VIII), Oct 1998.
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Modeling Program Predictability
Yiannakis Sazeides
25th International Symposium on Computer Architecture (ISCA-25), June-July 1998.
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Exploitation Idle Floating-Point Resources for Integer Execution
S. Subramanya Sastry
SIGPLAN '98 Conference on Programming Language Design and Implementation (PLDI), 1998.
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Speculative Versioning Cache
Sridhar Gopal
Fourth International Symposium on High-Performance Computer Architecture (HPCA-4), Feb 1998.
1997
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Exploiting Dead Value Information
Amir Roth
30th Annual international Symposium on Microarchitecture (MICRO-30), Dec 1997.
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Streamlining Inter-operation Memory Communication via Data Dependence Prediction
Andreas Moshovos
30th Annual international Symposium on Microarchitecture (MICRO-30), Dec 1997.
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Path-Based Next Trace Prediction
Quinn Jacobson
30th Annual international Symposium on Microarchitecture (MICRO-30), Dec 1997.
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The Predictability of Data Values
Yiannakis Sazeides
30th Annual international Symposium on Microarchitecture (MICRO-30), Dec 1997.
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Trace Processors
Eric Rotenberg
30th Annual international Symposium on Microarchitecture (MICRO-30), Dec 1997.
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Amdahl's Law: Not Just an Equation
Jim Smith
Keynote Address at the 24th International Symposium on Computer Architecture (ISCA-24), Denver, CO, June 1997.
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Dynamic Speculation and Synchronization of Data Dependences
Andreas Moshovos
24th International Symposium on Computer Architecture (ISCA-24), Denver, CO, June 1997.
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Dynamic Instruction Reuse
Avinash Sodani
24th International Symposium on Computer Architecture (ISCA-24), Denver, CO, June 1997.
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Complexity-Effective Superscalar Processors
Subbarao Palacharla
24th International Symposium on Computer Architecture (ISCA-24), Denver, CO, June 1997.
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An Evaluation of the Multiscalar Paradigm
Scott Breach
Workshop on Performance Analysis and Impact on Design (PAID), Denver, CO, June 1997.
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Dynamic Speculation-Synchronization of Data Dependences
Guri Sohi
DEC-Hudson, May 1997.
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Future Microprocessors and Scalable Systems
Guri Sohi
ARPA PI Meeting, Washington D.C., April 1997.
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Computing with Billion Transistor Chips
Guri Sohi
given at UW (Sept. 1996), Intel-Portland (Jan. 1997), Intel-Haifa (March 1997).
1996
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The Wisconsin Multiscalar Project
Jim Smith
ARPA PI Meeting, San Antonio, TX, February 14-16, 1996.
1995
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Will Instruction Sets be Important in Future Processors?
Guri Sohi
RISC in 1995, IBM T. J. Watson Research Center, Yorktown Heights, NY, November 7-8, 1995.
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The generic Multiscalar talk
Guri Sohi
Several places.