» A design space evaluation of grid processor architectures

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Ramadass Nagarajan, Karthikeyan Sankaralingam, Doug Burger, and Stephen W. Keckler. A design space evaluation of grid processor architectures. In Proceedings of the 34th Annual International Symposium on Microarchitecture, Austin, Texas, USA, December 1-5, 2001, pp. 40-51, ACM/IEEE Computer Society, 2001.

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BibTeX

 @inproceedings{DBLP:conf/micro/NagarajanSBK01,
   author    = {Ramadass Nagarajan and
                Karthikeyan Sankaralingam and
                Doug Burger and
                Stephen W. Keckler},
   editor    = {Yale N. Patt and
                Josh Fisher and
                Paolo Faraboschi and
                Kevin Skadron},
   title     = {A design space evaluation of grid processor architectures},
   booktitle = {Proceedings of the 34th Annual International Symposium on Microarchitecture,
                Austin, Texas, USA, December 1-5, 2001},
   pages     = {40--51},
   publisher = {{ACM/IEEE} Computer Society},
   year      = {2001},
   url       = {https://doi.org/10.1109/MICRO.2001.991104},
   doi       = {10.1109/MICRO.2001.991104},
   timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
   biburl    = {https://dblp.org/rec/conf/micro/NagarajanSBK01.bib},
   bibsource = {dblp computer science bibliography, https://dblp.org}
 }

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