» A fast and highly accurate path delay emulation framework for logic-emulation of timing speculation

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Shuou Nomura, Karthikeyan Sankaralingam, and Ranganathan Sankaralingam. A fast and highly accurate path delay emulation framework for logic-emulation of timing speculation. In 2011 IEEE International Test Conference, ITC 2010, Austin, TX, USA, November 2-4, 2010, pp. 635-644, IEEE Computer Society, 2010.

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BibTeX

 @inproceedings{DBLP:conf/itc/NomuraSS10,
   author    = {Shuou Nomura and
                Karthikeyan Sankaralingam and
                Ranganathan Sankaralingam},
   editor    = {Ron Press and
                Erik H. Volkerink},
   title     = {A fast and highly accurate path delay emulation framework for logic-emulation
                of timing speculation},
   booktitle = {2011 {IEEE} International Test Conference, {ITC} 2010, Austin, TX,
                USA, November 2-4, 2010},
   pages     = {635--644},
   publisher = {{IEEE} Computer Society},
   year      = {2010},
   url       = {https://doi.org/10.1109/TEST.2010.5699267},
   doi       = {10.1109/TEST.2010.5699267},
   timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
   biburl    = {https://dblp.org/rec/conf/itc/NomuraSS10.bib},
   bibsource = {dblp computer science bibliography, https://dblp.org}
 }

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