» Performance evaluation of a DySER FPGA prototype system spanning the compiler, microarchitecture, and hardware implementation

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Chen-Han Ho, Venkatraman Govindaraju, Tony Nowatzki, Ranjini Nagaraju, Zachary Marzec, Preeti Agarwal, Chris Frericks, Ryan Cofell, and Karthikeyan Sankaralingam. Performance evaluation of a DySER FPGA prototype system spanning the compiler, microarchitecture, and hardware implementation. In 2015 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2015, Philadelphia, PA, USA, March 29-31, 2015, pp. 203-214, IEEE Computer Society, 2015.

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 @inproceedings{DBLP:conf/ispass/HoGNNMAFCS15,
   author    = {Chen{-}Han Ho and
                Venkatraman Govindaraju and
                Tony Nowatzki and
                Ranjini Nagaraju and
                Zachary Marzec and
                Preeti Agarwal and
                Chris Frericks and
                Ryan Cofell and
                Karthikeyan Sankaralingam},
   title     = {Performance evaluation of a DySER {FPGA} prototype system spanning
                the compiler, microarchitecture, and hardware implementation},
   booktitle = {2015 {IEEE} International Symposium on Performance Analysis of Systems
                and Software, {ISPASS} 2015, Philadelphia, PA, USA, March 29-31, 2015},
   pages     = {203--214},
   publisher = {{IEEE} Computer Society},
   year      = {2015},
   url       = {https://doi.org/10.1109/ISPASS.2015.7095806},
   doi       = {10.1109/ISPASS.2015.7095806},
   timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
   biburl    = {https://dblp.org/rec/conf/ispass/HoGNNMAFCS15.bib},
   bibsource = {dblp computer science bibliography, https://dblp.org}
 }

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