| UW Madison Computer Architecture | » Understanding the backward slices of performance degrading instructions | 
| | Sorted by Date | Classified by Faculty | Craig B. Zilles and Gurindar S. Sohi. Understanding the backward slices of performance degrading instructions. In 27th International Symposium on Computer Architecture (ISCA 2000), June 10-14, 2000, Vancouver, BC, Canada, pp. 172-181, IEEE Computer Society, 2000. Download(unavailable) Abstract(unavailable) BibTeX @inproceedings{DBLP:conf/isca/ZillesS00,
   author    = {Craig B. Zilles and
                Gurindar S. Sohi},
   editor    = {Alan D. Berenbaum and
                Joel S. Emer},
   title     = {Understanding the backward slices of performance degrading instructions},
   booktitle = {27th International Symposium on Computer Architecture {(ISCA} 2000),
                June 10-14, 2000, Vancouver, BC, Canada},
   pages     = {172--181},
   publisher = {{IEEE} Computer Society},
   year      = {2000},
   url       = {http://doi.ieeecomputersociety.org/10.1109/ISCA.2000.854388},
   doi       = {10.1109/ISCA.2000.854388},
   timestamp = {Fri, 09 Jul 2021 15:53:36 +0200},
   biburl    = {https://dblp.org/rec/conf/isca/ZillesS00.bib},
   bibsource = {dblp computer science bibliography, https://dblp.org}
 }
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