UW Madison Computer Architecture |
» A First-Order Superscalar Processor Model |
| Sorted by Date | Classified by Faculty | Tejas Karkhanis and James E. Smith. A First-Order Superscalar Processor Model. In 31st International Symposium on Computer Architecture (ISCA 2004), 19-23 June 2004, Munich, Germany, pp. 338-349, IEEE Computer Society, 2004. Download(unavailable) Abstract(unavailable) BibTeX@inproceedings{DBLP:conf/isca/KarkhanisS04, author = {Tejas Karkhanis and James E. Smith}, title = {A First-Order Superscalar Processor Model}, booktitle = {31st International Symposium on Computer Architecture {(ISCA} 2004), 19-23 June 2004, Munich, Germany}, pages = {338--349}, publisher = {{IEEE} Computer Society}, year = {2004}, url = {https://doi.org/10.1109/ISCA.2004.1310786}, doi = {10.1109/ISCA.2004.1310786}, timestamp = {Wed, 16 Oct 2019 14:14:49 +0200}, biburl = {https://dblp.org/rec/conf/isca/KarkhanisS04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} } Generated by bib.pl (written by Patrick Riley ) on Mon Sep 27, 2021 15:47:05 time=1207019082 |
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