» GPU Computing Pipeline Inefficiencies and Optimization Opportunities in Heterogeneous CPU-GPU Processors

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Joel Hestness, Stephen W. Keckler, and David A. Wood. GPU Computing Pipeline Inefficiencies and Optimization Opportunities in Heterogeneous CPU-GPU Processors. In 2015 IEEE International Symposium on Workload Characterization, IISWC 2015, Atlanta, GA, USA, October 4-6, 2015, pp. 87-97, IEEE Computer Society, 2015.

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BibTeX

 @inproceedings{DBLP:conf/iiswc/HestnessKW15,
   author    = {Joel Hestness and
                Stephen W. Keckler and
                David A. Wood},
   title     = {{GPU} Computing Pipeline Inefficiencies and Optimization Opportunities
                in Heterogeneous {CPU-GPU} Processors},
   booktitle = {2015 {IEEE} International Symposium on Workload Characterization,
                {IISWC} 2015, Atlanta, GA, USA, October 4-6, 2015},
   pages     = {87--97},
   publisher = {{IEEE} Computer Society},
   year      = {2015},
   url       = {https://doi.org/10.1109/IISWC.2015.15},
   doi       = {10.1109/IISWC.2015.15},
   timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
   biburl    = {https://dblp.org/rec/conf/iiswc/HestnessKW15.bib},
   bibsource = {dblp computer science bibliography, https://dblp.org}
 }

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