» Exploitation of operation-level parallelism in a processor of the CRAY X-MP

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Sriram Vajapeyam, Gurindar S. Sohi, and Wei-Chung Hsu. Exploitation of operation-level parallelism in a processor of the CRAY X-MP. In Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 1990, Cambridge, MA, USA, 17-19 September, 1990, pp. 20-23, IEEE Computer Society, 1990.

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BibTeX

 @inproceedings{DBLP:conf/iccd/VajapeyamSH90,
   author    = {Sriram Vajapeyam and
                Gurindar S. Sohi and
                Wei{-}Chung Hsu},
   title     = {Exploitation of operation-level parallelism in a processor of the
                {CRAY} {X-MP}},
   booktitle = {Proceedings of the 1990 {IEEE} International Conference on Computer
                Design: {VLSI} in Computers and Processors, {ICCD} 1990, Cambridge,
                MA, USA, 17-19 September, 1990},
   pages     = {20--23},
   publisher = {{IEEE} Computer Society},
   year      = {1990},
   url       = {https://doi.org/10.1109/ICCD.1990.130149},
   doi       = {10.1109/ICCD.1990.130149},
   timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
   biburl    = {https://dblp.org/rec/conf/iccd/VajapeyamSH90.bib},
   bibsource = {dblp computer science bibliography, https://dblp.org}
 }

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