UW Madison Computer Architecture |
» Understanding the impact of gate-level physical reliability effects on whole program execution |
| Sorted by Date | Classified by Faculty | Raghuraman Balasubramanian and Karthikeyan Sankaralingam. Understanding the impact of gate-level physical reliability effects on whole program execution. In 20th IEEE International Symposium on High Performance Computer Architecture, HPCA 2014, Orlando, FL, USA, February 15-19, 2014, pp. 60-71, IEEE Computer Society, 2014. Download(unavailable) Abstract(unavailable) BibTeX@inproceedings{DBLP:conf/hpca/BalasubramanianS14, author = {Raghuraman Balasubramanian and Karthikeyan Sankaralingam}, title = {Understanding the impact of gate-level physical reliability effects on whole program execution}, booktitle = {20th {IEEE} International Symposium on High Performance Computer Architecture, {HPCA} 2014, Orlando, FL, USA, February 15-19, 2014}, pages = {60--71}, publisher = {{IEEE} Computer Society}, year = {2014}, url = {https://doi.org/10.1109/HPCA.2014.6835976}, doi = {10.1109/HPCA.2014.6835976}, timestamp = {Wed, 16 Oct 2019 14:14:50 +0200}, biburl = {https://dblp.org/rec/conf/hpca/BalasubramanianS14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} } Generated by bib.pl (written by Patrick Riley ) on Mon Sep 27, 2021 15:46:59 time=1207019082 |
Page last modified on November 19, 2024 |