fig8.ppc_o:     file format elf32-powerpcle

Disassembly of section .text:

00000000 <SdvMakeChoice>:
   0:	f0 ff 21 94 	stwu    r1,-16(r1)
   4:	0c 00 e1 93 	stw     r31,12(r1)
   8:	78 0b 3f 7c 	mr      r31,r1
   c:	00 00 00 38 	li      r0,0
  10:	78 03 03 7c 	mr      r3,r0
  14:	00 00 61 81 	lwz     r11,0(r1)
  18:	fc ff eb 83 	lwz     r31,-4(r11)
  1c:	78 5b 61 7d 	mr      r1,r11
  20:	20 00 80 4e 	blr

00000024 <error>:
  24:	f0 ff 21 94 	stwu    r1,-16(r1)
  28:	0c 00 e1 93 	stw     r31,12(r1)
  2c:	78 0b 3f 7c 	mr      r31,r1
  30:	00 00 61 81 	lwz     r11,0(r1)
  34:	fc ff eb 83 	lwz     r31,-4(r11)
  38:	78 5b 61 7d 	mr      r1,r11
  3c:	20 00 80 4e 	blr

00000040 <main>:
  40:	d0 ff 21 94 	stwu    r1,-48(r1)
  44:	a6 02 08 7c 	mflr    r0
  48:	34 00 01 90 	stw     r0,52(r1)
  4c:	2c 00 e1 93 	stw     r31,44(r1)
  50:	78 0b 3f 7c 	mr      r31,r1
  54:	00 00 00 38 	li      r0,0
  58:	08 00 1f 90 	stw     r0,8(r31)
  5c:	01 00 00 48 	bl      5c <main+0x1c>
  60:	78 1b 60 7c 	mr      r0,r3
  64:	00 00 80 2f 	cmpwi   cr7,r0,0
  68:	14 00 9e 41 	beq-    cr7,7c <main+0x3c>
  6c:	1c 00 3f 81 	lwz     r9,28(r31)
  70:	01 00 09 38 	addi    r0,r9,1
  74:	1c 00 1f 90 	stw     r0,28(r31)
  78:	10 00 00 48 	b       88 <main+0x48>
  7c:	1c 00 3f 81 	lwz     r9,28(r31)
  80:	ff ff 09 38 	addi    r0,r9,-1
  84:	1c 00 1f 90 	stw     r0,28(r31)
  88:	01 00 00 48 	bl      88 <main+0x48>
  8c:	78 1b 60 7c 	mr      r0,r3
  90:	00 00 80 2f 	cmpwi   cr7,r0,0
  94:	14 00 9e 41 	beq-    cr7,a8 <main+0x68>
  98:	18 00 3f 81 	lwz     r9,24(r31)
  9c:	01 00 09 38 	addi    r0,r9,1
  a0:	18 00 1f 90 	stw     r0,24(r31)
  a4:	10 00 00 48 	b       b4 <main+0x74>
  a8:	18 00 3f 81 	lwz     r9,24(r31)
  ac:	ff ff 09 38 	addi    r0,r9,-1
  b0:	18 00 1f 90 	stw     r0,24(r31)
  b4:	01 00 00 48 	bl      b4 <main+0x74>
  b8:	78 1b 60 7c 	mr      r0,r3
  bc:	00 00 80 2f 	cmpwi   cr7,r0,0
  c0:	14 00 9e 41 	beq-    cr7,d4 <main+0x94>
  c4:	14 00 3f 81 	lwz     r9,20(r31)
  c8:	01 00 09 38 	addi    r0,r9,1
  cc:	14 00 1f 90 	stw     r0,20(r31)
  d0:	10 00 00 48 	b       e0 <main+0xa0>
  d4:	14 00 3f 81 	lwz     r9,20(r31)
  d8:	ff ff 09 38 	addi    r0,r9,-1
  dc:	14 00 1f 90 	stw     r0,20(r31)
  e0:	01 00 00 48 	bl      e0 <main+0xa0>
  e4:	78 1b 60 7c 	mr      r0,r3
  e8:	00 00 80 2f 	cmpwi   cr7,r0,0
  ec:	14 00 9e 41 	beq-    cr7,100 <main+0xc0>
  f0:	10 00 3f 81 	lwz     r9,16(r31)
  f4:	01 00 09 38 	addi    r0,r9,1
  f8:	10 00 1f 90 	stw     r0,16(r31)
  fc:	10 00 00 48 	b       10c <main+0xcc>
 100:	10 00 3f 81 	lwz     r9,16(r31)
 104:	ff ff 09 38 	addi    r0,r9,-1
 108:	10 00 1f 90 	stw     r0,16(r31)
 10c:	01 00 00 48 	bl      10c <main+0xcc>
 110:	78 1b 60 7c 	mr      r0,r3
 114:	00 00 80 2f 	cmpwi   cr7,r0,0
 118:	14 00 9e 41 	beq-    cr7,12c <main+0xec>
 11c:	0c 00 3f 81 	lwz     r9,12(r31)
 120:	01 00 09 38 	addi    r0,r9,1
 124:	0c 00 1f 90 	stw     r0,12(r31)
 128:	10 00 00 48 	b       138 <main+0xf8>
 12c:	0c 00 3f 81 	lwz     r9,12(r31)
 130:	ff ff 09 38 	addi    r0,r9,-1
 134:	0c 00 1f 90 	stw     r0,12(r31)
 138:	08 00 1f 80 	lwz     r0,8(r31)
 13c:	00 00 80 2f 	cmpwi   cr7,r0,0
 140:	08 00 9e 41 	beq-    cr7,148 <main+0x108>
 144:	01 00 00 48 	bl      144 <main+0x104>
 148:	00 00 00 38 	li      r0,0
 14c:	78 03 03 7c 	mr      r3,r0
 150:	00 00 61 81 	lwz     r11,0(r1)
 154:	04 00 0b 80 	lwz     r0,4(r11)
 158:	a6 03 08 7c 	mtlr    r0
 15c:	fc ff eb 83 	lwz     r31,-4(r11)
 160:	78 5b 61 7d 	mr      r1,r11
 164:	20 00 80 4e 	blr