fig6.ppc_o:     file format elf32-powerpcle

Disassembly of section .text:

00000000 <error>:
   0:	f0 ff 21 94 	stwu    r1,-16(r1)
   4:	0c 00 e1 93 	stw     r31,12(r1)
   8:	78 0b 3f 7c 	mr      r31,r1
   c:	00 00 61 81 	lwz     r11,0(r1)
  10:	fc ff eb 83 	lwz     r31,-4(r11)
  14:	78 5b 61 7d 	mr      r1,r11
  18:	20 00 80 4e 	blr

0000001c <main>:
  1c:	e0 ff 21 94 	stwu    r1,-32(r1)
  20:	a6 02 08 7c 	mflr    r0
  24:	24 00 01 90 	stw     r0,36(r1)
  28:	1c 00 e1 93 	stw     r31,28(r1)
  2c:	78 0b 3f 7c 	mr      r31,r1
  30:	00 00 00 38 	li      r0,0
  34:	08 00 1f 90 	stw     r0,8(r31)
  38:	10 00 00 48 	b       48 <main+0x2c>
  3c:	0c 00 3f 81 	lwz     r9,12(r31)
  40:	ff ff 09 38 	addi    r0,r9,-1
  44:	0c 00 1f 90 	stw     r0,12(r31)
  48:	0c 00 1f 80 	lwz     r0,12(r31)
  4c:	00 00 80 2f 	cmpwi   cr7,r0,0
  50:	ec ff 9d 41 	bgt+    cr7,3c <main+0x20>
  54:	08 00 1f 80 	lwz     r0,8(r31)
  58:	00 00 80 2f 	cmpwi   cr7,r0,0
  5c:	08 00 9e 41 	beq-    cr7,64 <main+0x48>
  60:	01 00 00 48 	bl      60 <main+0x44>
  64:	00 00 00 38 	li      r0,0
  68:	78 03 03 7c 	mr      r3,r0
  6c:	00 00 61 81 	lwz     r11,0(r1)
  70:	04 00 0b 80 	lwz     r0,4(r11)
  74:	a6 03 08 7c 	mtlr    r0
  78:	fc ff eb 83 	lwz     r31,-4(r11)
  7c:	78 5b 61 7d 	mr      r1,r11
  80:	20 00 80 4e 	blr