Dark Silicon and the End of Multicore Scaling
Hadi Esmaeilzadeh, Emily Blem, Renee St. Amant, Karu Sankaralingam, and Doug Burger
ISCA 2011, IEEE Top Picks 2012
Interactive tool is still under development. Upcoming features include:
User defined technology scaling factors (area, power, and frequency)
Input your own Pareto frontiers (at 45 nm)
Area and power budget parameters
Ability to pick cache miss rate functions and cache budgets
Baseline chips other than a quad-core Nehalem
If you would like to see additional features, please send us your suggestions!
If you would like a copy of the source code, have technical questions/difficulties, or have suggestions, please email blem@cs.wisc.edu.
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} else {
if (!isset($_POST['Start Over'])) {
# check arbitrary benchmark inputs to make sure they are reasonable
$success = 1;
if ($benchmark=="Arbitrary"){
if(is_null($fparallel) || !is_numeric($fparallel) || $fparallel <0 || $fparallel > 1){
echo "