usermode/library/atomic_ops/read_ordered.h

00001 /*
00002  * Copyright (c) 2003 by Hewlett-Packard Company.  All rights reserved.
00003  *
00004  * Permission is hereby granted, free of charge, to any person obtaining a copy
00005  * of this software and associated documentation files (the "Software"), to deal
00006  * in the Software without restriction, including without limitation the rights
00007  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
00008  * copies of the Software, and to permit persons to whom the Software is
00009  * furnished to do so, subject to the following conditions:
00010  *
00011  * The above copyright notice and this permission notice shall be included in
00012  * all copies or substantial portions of the Software.
00013  *
00014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
00015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
00016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
00017  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
00018  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
00019  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
00020  * SOFTWARE.
00021  */
00022 
00023 /*
00024  * These are common definitions for architectures that provide processor
00025  * ordered memory operations except that a later read may pass an
00026  * earlier write.  Real x86 implementations seem to be in this category,
00027  * except apparently for some IDT WinChips, which we ignore.
00028  */
00029 
00030 AO_INLINE void
00031 AO_nop_read(void)
00032 {
00033   AO_compiler_barrier();
00034 }
00035 
00036 #define AO_HAVE_NOP_READ
00037 
00038 #ifdef AO_HAVE_load
00039 
00040 AO_INLINE AO_t
00041 AO_load_read(const volatile AO_t *addr)
00042 {
00043   AO_t result = AO_load(addr);
00044   AO_compiler_barrier();
00045   return result;
00046 }
00047 #define AO_HAVE_load_read
00048 
00049 #define AO_load_acquire(addr) AO_load_read(addr)
00050 #define AO_HAVE_load_acquire
00051 
00052 #endif /* AO_HAVE_load */
00053 
00054 #ifdef AO_HAVE_char_load
00055 
00056 AO_INLINE AO_t
00057 AO_char_load_read(const volatile unsigned char *addr)
00058 {
00059   AO_t result = AO_char_load(addr);
00060   AO_compiler_barrier();
00061   return result;
00062 }
00063 #define AO_HAVE_char_load_read
00064 
00065 #define AO_char_load_acquire(addr) AO_char_load_read(addr)
00066 #define AO_HAVE_char_load_acquire
00067 
00068 #endif /* AO_HAVE_char_load */
00069 
00070 #ifdef AO_HAVE_short_load
00071 
00072 AO_INLINE AO_t
00073 AO_short_load_read(const volatile unsigned short *addr)
00074 {
00075   AO_t result = AO_short_load(addr);
00076   AO_compiler_barrier();
00077   return result;
00078 }
00079 #define AO_HAVE_short_load_read
00080 
00081 #define AO_short_load_acquire(addr) AO_short_load_read(addr)
00082 #define AO_HAVE_short_load_acquire
00083 
00084 #endif /* AO_HAVE_short_load */
00085 
00086 #ifdef AO_HAVE_int_load
00087 
00088 AO_INLINE AO_t
00089 AO_int_load_read(const volatile unsigned int *addr)
00090 {
00091   AO_t result = AO_int_load(addr);
00092   AO_compiler_barrier();
00093   return result;
00094 }
00095 #define AO_HAVE_int_load_read
00096 
00097 #define AO_int_load_acquire(addr) AO_int_load_read(addr)
00098 #define AO_HAVE_int_load_acquire
00099 
00100 #endif /* AO_HAVE_int_load */

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