Concurrency bugs are caused by non-deterministic interleavings between shared memory accesses. Their effects propagate through data and control dependences until they cause software to crash, hang, produce incorrect output, etc. The lifecycle of a bug thus consists of three phases: (1) triggering, (2) propagation, and (3) failure. Traditional techniques for detecting concurrency bugs mostly focus on phase (1)i.e., on finding certain structural patterns of interleavings that are common triggers of concurrency bugs, such as data races. This paper explores a consequence-oriented approach to improving the accuracy and coverage of state-space search and bug detection. The proposed approach first statically identifies potential failure sites in a program binary (i.e., it first considers a phase (3) issue). It then uses static slicing to identify critical read instructions that are highly likely to affect potential failure sites through control and data dependences (phase (2)). Finally, it monitors a single (correct) execution of a concurrent program and identifies suspicious interleavings that could cause an incorrect state to arise at a critical read and then lead to a software failure (phase (1)). ConSeq's backwards approach, (3)->(2)->(1), provides advantages in bug-detection coverage and accuracy but is challenging to carry out. ConSeq makes it feasible by exploiting the empirical observation that phases (2) and (3) usually are short and occur within one thread. Our evaluation on large, real-world C/C++ applications shows that ConSeq detects more bugs than traditional approaches and has a much lower false-positive rate.
Research Retreat Session 1: Reliability
Talk 1. Refuse to Crash with Re-FUSE Swaminathan Sundararaman, Laxman Visampalli, Andrea Arpaci-Dusseau and Remzi Arpaci-Dusseau (30 min)
Talk 2. Automated Atomicity-Violation Fixing Guoliang Jin, Linhai Song, Wei Zhang, Shan Lu and Ben Liblit (20 min)
Talk 3. SymDrive: Testing Drivers Without Devices Matthew Renzelmann, Asim Kadav and Michael Swift (20 min)
Talk 4: FATE and DESTINI: A Framework for Cloud Recovery Testing (20 min) Thanh Do
More information avaialable at http://pages.cs.wisc.edu/~swift/wsrr/
Research Retreat Session 2: Scalability
Talk 1: Improving the Scalability of the TotalView Debugger using TBON-FS and proc++ Michael J. Brim and Barton P. Miller (30 min)
Talk 2: Emulating Goliath Storage Systems with David Leo Prasath Arulraj and Nitin Agarwal (20 min)
Talk 3: Hathi: Durable Transactions for Memory using Flash Mohit Saxena and Michael Swift (20 min)
Talk 4: Deconstructing the I/O Behavior of the iBench Task Suite Tyler Harter and Chris Dragga (20 min)
More information avaialable at http://pages.cs.wisc.edu/~swift/wsrr/
Research Retreat Session 3: Systems Research
Talk 1: ConSeq: Detecting Concurrency Bugs through Sequential Errors Wei Zhang, Junghee Lim, Ramya Olichandran, Joel Scherpelz, Guoliang Jin, Shan Lu and Thomas Reps (30 min)
Talk 2:The Best of Both Worlds with On-Demand Virtualization Thawan Kooburat and Michael Swift (20 min)
Talk 3: Coerced Cache Eviction and Discreet-Mode Journaling: Dealing with Misbehaving Disks Abhishek Rajimwale, Vijay Chidambaram, Deepak Ramamurthi, Remzi Arpaci-Dusseau and Andrea Arpaci-Dusseau (20 min)
Talk 4: Dynamic Processors Demand Dynamic Operating Systems Sankaralingam Panneerselvam and Michael Swift (20 min)
More information avaialable at http://pages.cs.wisc.edu/~swift/wsrr/
Abstract: Emerging, fast non-volatile memories are around 1000s of times faster than conventional disks in terms of latency, and they offer enormous gains in bandwidth as well. Fully leveraging these technologies will require far-reaching changes in how storage systems operate. To understand the impact of this increased storage performance, we have developed a prototype high-performance storage system called Moneta. Our experience with Moneta shows that system and application software designed for a world of slow disks is a poor fit for storage devices based on these new technologies. Moneta's hardware interface and software stack work together to remove software overheads such as disk-centric IO scheduling, contentious locks, and system call overheads. Moneta also provides a generic facility for removing file system overheads almost entirely. The combination of these optimizations reduces latency for a 4KB read request from 25.5us to 7.9us and increases sustained bandwidth for small requests by 26 times. We compare Moneta to a range of storage devices based on disks, flash memory, and advanced non-volatile memories, and find that further work is required at the application level to fully leverage the potential of these new memories.
Bio: Steven Swanson is an assistant professor in the Department of Computer Science and Engineering at the University of California, San Diego and the director of the Non-volatile Systems Laboratory. His research interests include the systems, architecture, security, and reliability issues surrounding non-volatile, solid-state memories. He also co-leads projects to develop low-power co-processors for irregular applications and to devise software techniques for using multiple processors to speed up single-threaded computations. In previous lives he has worked on scalable dataflow architectures, ubiquitous computing, and simultaneous multithreading. He received his PhD from the University of Washington in 2006.