Transactional Memory Bibliography

[Knight, 1986]

Thomas F. Knight (Aug 1986).
An Architecture for Mostly Functional Languages.
In: Proceedings of ACM Lisp and Functional Programming Conference. pp. 500--519.

[Jensen et al., 1987]

Eric H. Jensen and Gary W. Hagensen and Jeffrey M. Broughton (Nov 1987).
A New Approach to Exclusive Data Access in Shared Memory Multiprocessors.
(Technical Report UCRL-97663).

[Chang and Mergen, 1988]

Albert Chang and Mark F. Mergen ( 1988).
801 Storage: Architecture and Programming.
In: ACM Transactions on Computer Systems (TOCS). Volume 61. pp. 28--50.

[Adve, 1990]

Sarita V.and Hill Adve (May 1990).
Weak Ordering - A New Definition.
In: Proceedings of the 17th Annual International Symposium on Computer Architecture. pp. 2--14.

[Gharachorloo et al., 1990]

Kourosh Gharachorloo and Daniel Lenoski and James Laudon and Philip Gibbons and Anoop Gupta and John Hennessy (May 1990).
Memory Consistency and Event Ordering in Scalable Shared-Memory Multiprocessors.
In: Proceedings of the 17th Annual International Symposium on Computer Architecture. pp. 15--26.

[Adve et al., 1991]

Sarita V. Adve and Mark D. Hill and Barton P. Miller and Robert H. B. Netzer (May 1991).
Detecting Data Races on Weak Memory Systems.
In: Proceedings of the 18th Annual International Symposium on Computer Architecture. pp. 234--243.

[Banatre et al., 1991]

Michel Banatre and Gilles Muller and Bruno Rochat and P. Sanchez ( 1991).
Design Decisions for the FTM: A General Purpose Fault Tolerant Machine.
In: FTCS. pp. 71-78.

[Herlihy and Moss, 1993]

Maurice Herlihy and J. Eliot B. Moss (May 1993).
Transactional Memory: Architectural Support for Lock-Free Data Structures.
In: Proceedings of the 20th Annual International Symposium on Computer Architecture. pp. 289--300.

[Stone et al., 1993]

Janice M. Stone and Harold S. Stone and Phil Heidelberger and John Turek (Nov 1993).
Multiple Reservations and the Oklahoma Update.
In: IEEE Parallel & Distributed Technology, 1(4):58--71.

[Adve and Gharachorloo, 1996]

Sarita V. Adve and Kourosh Gharachorloo (Dec 1996).
Shared Memory Consistency Models: A Tutorial.
In: IEEE Computer, 29(12):66--76.

[Muller et al., 1996]

Gilles Muller and Michel Banatre and Nadine Peyrouze and Bruno Rochat ( 1996).
Lessons from FTM: An Experiment in Design and Implementation of a Low-Cost Fault-Tolerant System.
(2):332-339.

[Plakal et al., 1998]

Manoj Plakal and Daniel J. Sorin and Anne E. Condon and Mark D. Hill (Jun 1998).
Lamport Clocks: Verifying a Directory Cache-Coherence Protocol.
In: Proceedings of the Tenth ACM Symposium on Parallel Algorithms and Architectures. pp. 67--76.

[Hill, 1998]

Mark D. Hill (Aug 1998).
Multiprocessors Should Support Simple Memory Consistency Models.
In: IEEE Computer, 31(8):28--34.

[Gniady et al., 1999]

Chris Gniady and Babak Falsafi and T. N. Vijaykumar (May 1999).
Is SC + ILP = RC?
In: International Symposium on Computer Architecture. pp. 162--171.

[Rajwar and Goodman, 2001]

Ravi Rajwar and James R. Goodman (Dec 2001).
Speculative Lock Elision: Enabling Highly Concurrent Multithreaded Execution.
In: Proceedings of the 34th International Symposium on Microarchitecture. pp. 294--305.

[Sorin et al., 2002]

Daniel J. Sorin and Milo M. K. Martin and Mark D. Hill and David A. Wood (May 2002).
SafetyNet: Improving the Availability of Shared Memory Multiprocessors with Global Checkpoint/Recovery.
In: Proceedings of the 29th Annual International Symposium on Computer Architecture. pp. 123--134.

[Gniady and Falsafi, 2002]

Chris Gniady and Babak Falsafi (Sep 2002).
Speculative Sequential Consistency with Little Custom Storage.
In: International Conference on Parallel Architectures and Compilation Techniques. pp. 179--188.

[Martinez and Torrellas, 2002]

Jose F. Martinez and Josep Torrellas (Oct 2002).
Speculative Synchronization: Applying Thread-Level Speculation to Explicitly Parallel Applications.
In: Proceedings of the Tenth Symposium on Architectural Support for Programming Languages and Operating Systems. pp. 18--29.

[Rajwar, 2002]

Ravi Rajwar (Oct 2002).
Speculation-Based Techniques for Transactional Lock-Free Execution of Lock-Based Programs.
PhD thesis, University of Wisconsin.

[Rajwar and Goodman, 2002]

Ravi Rajwar and James R. Goodman (Oct 2002).
Transactional Lock-Free Execution of Lock-Based Programs.
In: Proceedings of the Tenth Symposium on Architectural Support for Programming Languages and Operating Systems. pp. 5--17.

[Kuszmaul and Leiserson, 2003]

Bradley C. Kuszmaul and Charles E. Leiserson (jan 2003).
Transactions Everywhere.

[Xu et al., 2003]

Min Xu and Rastislav Bodik and Mark D. Hill (Jun 2003).
A ``Flight Data Recorder'' for Enabling Full-System Multiprocessor Deterministic Replays.
In: Proceedings of the 30th Annual International Symposium on Computer Architecture. pp. 122--133.

[Rajwar and Bernstein, 2003]

Ravi Rajwar and Philip A. Bernstein (Oct 2003).
Atomic Transactional Execution in Hardware: A New High-Performance Abstraction for Databases.
In: Position paper for the 10th International Workshop on High Performance Transaction Systems.

[Rajwar and Goodman, 2003]

Ravi Rajwar and James R. Goodman (Nov-Dec 2003).
Transactional Execution: Toward Reliable, High-Performance Multithreading..
In: IEEE Micro, 23(6):117-125.

[Gniady and Falsafi, 2003]

Chris Gniady and Babak Falsafi ( 2003).
Speculative Sequential Consistency with Little Custom Storage.
In: Journal of Instruction-Level Parallelism, 5.

[Lie, 2004]

Sean Lie (May 2004).
Hardware Support for Unbounded Transactional Memory.
Masters thesis, Massachusetts Institute of Technology.

[Hammond et al., 2004]

Lance Hammond and Vicky Wong and Mike Chen and Brian D. Carlstrom and John D. Davis and Ben Hertzberg and Manohar K. Prabhu and Honggo Wijaya and Christos Kozyrakis and Kunle Olukotun (Jun 2004).
Transactional Memory Coherence and Consistency.
In: Proceedings of the 31st Annual International Symposium on Computer Architecture. pp. 102. IEEE Computer Society.

[Moore, 2004]

Kevin E. Moore (Oct 2004).
Thread-Level Transactional Memory.
In: Wisconsin Industrial Affiliates Meeting. Wisconsin Industrial Affiliates Meeting.

[Hammond et al., 2004]

Lance Hammond and Brian D. Carlstrom and Vicky Wong and Mike Chen and Christos Kozyrakis and Kunle Olukotun (Nov-Dec 2004).
Transactional Coherence and Consistency: Simplifying Parallel Hardware and Software.
In: IEEE Micro, 24(6).

[Ananian et al., 2005]

C. Scott Ananian and Krste Asanovic and Bradley C. Kuszmaul and Charles E. Leiserson and Sean Lie (Feb 2005).
Unbounded Transactional Memory.
In: Proceedings of the Eleventh International Symposium on High-Performance Computer Architecture. pp. 316--327.

[Kozyrakis and Olukotun, 2005]

Christos Kozyrakis and Kunle Olukotun (Feb 2005).
ATLAS: A Scalable Emulator for Transactional Parallel System.
In: Workshop on Architecture Research using FPGA Platforms, 11th International Symposium on High-Performance Computer Architectur.

[Moore et al., 2005]

Kevin E. Moore and Mark D. Hill and David A. Wood (Mar 2005).
Thread-Level Transactional Memory.
In: Technical Report: CS-TR-2005-1524, Dept. of ComputerSciences, University of Wisconsin, :1--11.

[Xu et al., 2005]

Min Xu and Rastislav Bodik and Mark D. Hill (Jun 2005).
A Serializability Violation Detector for Shared-Memory Server Programs.
In: Proceedings of the SIGPLAN 2005 Conference on Programming Language Design and Implementation. pp. 1--14.

[Chafi et al., 2005]

Hassan Chafi and Chi Cao Minh and Austen McDonald and Brian D. Carlstrom and JaeWoong Chung and Lance Hammond and Christos Kozyrakis and Kunle Olukotun (June 2005).
TAPE: A Transactional Application Profiling Environment.
In: ICS '05: Proceedings of the 19th annual international conference on Supercomputing. pp. 199--208.

[Rajwar et al., 2005]

Ravi Rajwar and Maurice Herlihy and Konrad Lai (Jun 2005).
Virtualizing Transactional Memory.
In: Proceedings of the 32nd Annual International Symposium on Computer Architecture. pp. 494--505. IEEE Computer Society.

[Moreshet et al., 2005]

Tali Moreshet and R. Iris Bahar and Maurice Herlihy (aug 2005).
Energy reduction in multiprocessor systems using transactional memory (poster).
In: ISLPED~'05: Proceedings of the 2005 international symposium on Low power electronics and design. pp. 331--334.

[McDonald et al., 2005]

Austen McDonald and JaeWoong Chung and Hassan Chafi and Chi Cao Minh and Brian D. Carlstrom and Lance Hammond and Christos Kozyrakis and Kunle Olukotun (Sept 2005).
Characterization of TCC on Chip-Multiprocessors.
In: Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques.

[Shriram et al., 2005]

Arrvindh Shriram and Virendra J. Marathe and Sandhya Dwarkadas and Michael L. Scott and David Eisenstat and Christopher Heriot and William N. Scherer III and Michael F. Spear (Dec 2005).
Hardware Acceleration of Software Transactional Memory.
Technical Report Nr. TR 887. Computer Science Department, University of Rochester. Revised, March 2006; condensed version submitted for publication.

[Goetz, 2006]

Brian Goetz (Jan 2006).
Optimistic Thread Concurrency.
Azul Systems Whitepaper.

[Moore et al., 2006]

Kevin E. Moore and Jayaram Bobba and Michelle J. Moravan and Mark D. Hill and David A. Wood (Feb 2006).
LogTM: Log-based Transactional Memory.
In: Proceedings of the 12th International Symposium on High-Performance Computer Architecture. pp. 254--265.

[Chung et al., 2006]

JaeWoong Chung and Hassan Chafi and Chi Cao Minh and Austen McDonald and Brian D. Carlstrom and Christos Kozyrakis and Kunle Olukotun (Feb 2006).
The Common Case Transactional Behavior of Multithreaded Programs.
In: 12th International Symposium on High Performance Computer Architecture (HPCA).

[Njoroge et al., 2006]

Njuguna Njoroge and Sewook Wee and Jared Casper and Justin Burdick and Yuriy Teslyar and Christos Kozyrakis and Kunle Olukotun (Feb 2006).
Building and Using the ATLAS Transactional Memory System.
In: Workshop on Architecture Research using FPGA Platforms, 12th International Symposium on High-Performance Computer Architecture.

[Kumar et al., 2006]

Sanjeev Kumar and Michael Chu and Christopher J. Hughes and Partha Kundu and Anthony Nguyen (Mar 2006).
Hybrid Transactional Memory.
In: Proceedings of Symposium on Principles and Practice of Parallel Programming.

[Blundell et al., 2006]

Colin Blundell and E Christopher Lewis and Milo M. K. Martin (Apr 2006).
Unrestricted Transactional Memory: Supporting I/O and System Calls within Transactions.
Technical Report Nr. CIS-06-09. Department of Computer and Information Science, University of Pennsylvania.

[Ceze et al., 2006]

Luis Ceze and James Tuck and Calin Cascaval and Josep Torrellas (June 2006).
Bulk Disambiguation of Speculative Threads in Multiprocessors.
In: Proceedings of the 33rd Annual International Symposium on Computer Architecture.

[Chung et al., 2006]

JaeWoong Chung and Chi Cao Minh and Brian D. Carlstrom and Christos Kozyrakis (Jun 2006).
Parallelizing SPECjbb2000 with Transactional Memory.
In: Proc. Workshop on Transactional Workloads.

[McDonald et al., 2006]

Austen McDonald and JaeWoong Chung and D. Carlstrom Brian and Chi Cao Minh and Hassan Chafi and Christos Kozyrakis and Kunle Olukotun (Jun 2006).
Architectural Semantics for Practical Transactional Memory.
pp. 53-65.

[Shriraman et al., 2006]

Arrvindh Shriraman and Virendra J. Marathe and Sandhya Dwarkadas and Michael L. Scott and David Eisenstat and Christopher Heriot and William N. Scherer III and Michael F. Spear (Jun 2006).
Hardware Acceleration of Software Transactional Memory.
In: ACM SIGPLAN Workshop on Transactional Computing. Held in conjunction with PLDI 2006. Expanded version available as TR 887, Department of Computer Science, University of Rochester, December 2005, revised March 2006.

[Zilles and Baugh, 2006]

Craig Zilles and Lee Baugh (Jun 2006).
Extending Hardware Transactional Memory to Support Nonbusy Waiting and Nontransactional Actions.
In: Proceedings of the First ACM SIGPLAN Workshop on Languages, Compilers, and Hardware Support for Transactional Computing.

[Manovit et al., 2006]

Chaiyasit Manovit and Sudheendra Hangal and Hassan Chafi and Austen McDonald and Christos Kozyrakis and Kunle Olukotun (sep 2006).
Testing implementations of transactional memory.
In: PACT~'06: Proceedings of the 15th international conference on Parallel architectures and compilation techniques. pp. 134--143.

[Chung et al., 2006]

JaeWoong Chung and Chi Cao Minh and Austen McDonald and Travis Skare and Hassan Chafi and Brian D. Carlstrom and Christos Kozyrakis and Kunle Olukotun (Oct 2006).
Tradeoffs in Transactional Memory Virtualization.
In: ASPLOS-XII: Proceedings of the 12th international conference on Architectural support for programming languages and operating systems. ACM Press.

[Riley and Zilles, 2006]

Nicholas Riley and Craig Zilles (Oct 2006).
Hardware Transactional Memory Support for Lightweight Dynamic Language Evolution.
In: Dynamic Language Symposium.

[Adl-Tabatabai et al., 2006]

Ali-Reza Adl-Tabatabai and Christos Kozyrakis and Bratin Eswaran Saha (Dec 2006).
Unlocking Concurrency: Multicore Programming with Transactional Memory.
In: ACM Queue, 4(10):24--33.

[Chuang et al., 2006]

Weihaw Chuang and Satish Narayanasamy and Ganesh Venkatesh and Jack Sampson and Michael Van Biesbrouck and Gilles Pokam and Brad Calder and Osvaldo Colavin ( 2006).
Unbounded page-based transactional memory.
In: ASPLOS-XII: Proceedings of the 12th international conference on Architectural support for programming languages and operating systems. pp. 347--358. Published by ACM.

[McDonald et al., 2007]

Austen McDonald and Brian Carlstrom and JaeWoong Chung and Chi Cao Minh and Hassan Chafi and Christos Kozyrakis and Kunle Olukotun (Jan 2007).
Transactional Memory: The Hardware-Software Interface.
In: IEEE Micro, 27(1).

[Yen et al., 2007]

Luke Yen and Jayaram Bobba and Michael M. Marty and Kevin E. Moore and Haris Volos and Mark D. Hill and Michael M. Swift and David A. Wood (Feb 2007).
LogTM-SE: Decoupling Hardware Transactional Memory from Caches.
In: Proceedings of the 13th International Symposium on High-Performance Computer Architecture(HPCA).

[Guerraoui et al., 2007]

Rachid Guerraoui and Michal Kapalka and Jan Vitek (Mar 2007).
STMBench7: A Benchmark for Software Transactional Memory.
In: Proceedings of the Second European Systems Conference (EuroSys2007). pp. 315--324. Published by ACM.

[Spear et al., 2007]

Michael F. Spear and Arrvindh Shriraman and Hemayet Hossain and Sandhya Dwarkadas and Michael L. Scott (Mar 2007).
Alert-on-Update: A Communication Aid for Shared Memory Multiprocessors (poster paper).
In: Proceedings of the Twelfth ACM Symposium on Principles and Practice of Parallel Programming.

[Kachris and Kulkarni, 2007]

Christoforos Kachris and Chidamber Kulkarni (April 2007).
Configurable Transactional Memory.
In: Proceedings of the 15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines. pp. 65--72.

[Njoroge et al., 2007]

Njuguna Njoroge and Jared Casper and Sewook Wee and Yuriy Teslyar and Daxia Ge and Christos Kozyrakis and Kunle Olukotun (Apr 2007).
ATLAS: A Chip-Multiprocessor with Transactional Memory Support.
In: Proceedings of the Conference on Design Automation and Test in Europe.

[Porter et al., 2007]

Donald E. Porter and Owen S. Hofmann and Emmett Witchel (May 2007).
Is the Optimism in Optimistic Concurrency Warranted?
In: Proceedings of the 11th Workshop on Hot Topics in Operating Systems.

[Blake and Mudge, 2007]

Geoffrey Blake and Trevor Mudge (jun 2007).
Duplicating and Verifying LogTM with OS Support in the M5 Simulator.
In: WDDD~'07: Proc. 6th Workshop on Duplicating, Deconstructing, and Debunking.

[Bobba et al., 2007]

Jayaram Bobba and Kevin E. Moore and Luke Yen and Haris Volos and Mark D. Hill and Michael M. Swift and David A. Wood (Jun 2007).
Performance Pathologies in Hardware Transactional Memory.
In: Proceedings of the 34th Annual International Symposium on Computer Architecture.

[Cao Minh et al., 2007]

Chi Cao Minh and Martin Trautmann and JaeWoong Chung and Austen McDonald and Nathan Bronson and Jared Casper and Christos Kozyrakis and Kunle Olukotun (Jun 2007).
An Effective Hybrid Transactional Memory System with Strong Isolation Guarantees.
In: Proceedings of the 34th Annual International Symposium on Computer Architecture.

[Neelakantam et al., 2007]

Naveen Neelakantam and Ravi Rajwar and Suresh Srinivas and Uma Srinivasan and Craig Zilles (June 2007).
Hardware Atomicity for Reliable Software Speculation .
In: Proceedings of the 34th Annual International Symposium on Computer Architecture.

[Shriraman et al., 2007]

Arrvindh Shriraman and Michael F. Spear and Hemayet Hossain and Virendra Marathe and Sandhya Dwarkadas and Michael L. Scott (Jun 2007).
An Integrated Hardware-Software Approach To Flexible Transactional Memory.
In: Proceedings of the 34rd Annual International Symposium on Computer Architecture.

[Spear et al., 2007]

Michael F. Spear and Arrvindh Shriraman and Luke Dalessandro and Sandhya Dwarkadas and Michael L. Scott (Jun 2007).
Nonblocking Transactions Without Indirection Using Alert-on-Update.
In: Proceedings of the 19th Annual ACM SYMP on Parallelism in Algorithms and Architectures. San Diego, CA.

[Waliullah and Stenstrom, 2007]

M. M. Waliullah and Per Stenstrom (Aug 2007).
Starvation-Free Transactional Memory System Protocols.
In: Proceedings of the 13th Euro-Par Conference: European Conference on Parallel and Distributed Computing. pp. 280--291.

[Baugh and Zilles, 2007]

Lee Baugh and Craig Zilles (aug 2007).
Analysis of I/O and Syscalls in Critical Sections and Their Implications for Transactional Memory.
In: TRANSACT~'07: 2nd Workshop on Transactional Computing.

[Hofmann et al., 2007]

Owen S. Hofmann and Donald E. Porter and Christopher J. Rossbach and Hany E. Ramadan and Emmett Witchel (aug 2007).
Solving Difficult HTM Problems Without Difficult Hardware.
In: TRANSACT~'07: 2nd Workshop on Transactional Computing.

[Tremblay, 2007]

Marc Tremblay (aug 2007).
Transactional memory for a modern microprocessor.

[Blundell et al., 2007]

Colin Blundell and Joe Devietti and E. Christopher Lewis and Milo M. K. Martin ( 2007).
Making the fast case common and the uncommon case simple in unbounded transactional memory.
In: SIGARCH Comput. Archit. News, 35(2):24--34.

[Ferri et al., 2007]

Cesare Ferri and Tali Moreshet and R. Iris Bahar and Luca Benini and Maurice Herlihy ( 2007).
A hardware/software framework for supporting transactional memory in a MPSoC environment.
In: SIGARCH Comput. Archit. News, 35(1):47--54.

[Rossbach et al., 2007]

Christopher J. Rossbach and Owen S. Hofmann and Donald E. Porter and Hany E. Ramadan and Aditya Bhandari and Emmett Witchel ( 2007).
TxLinux: using and managing hardware transactional memory in an operating system.
In: SOSP '07: Proceedings of twenty-first ACM SIGOPS Symposium on Operating Systems Principles. New York, NY, USA, pp. 87--102. Published by ACM.

[Ramadan et al., 2007]

Hany E. Ramadan and Christopher J. Rossbach and Donald E. Porter and Owen S. Hofmann and Aditya Bhandari and Emmett Witchel ( 2007).
MetaTM/TxLinux: transactional memory for an operating system.
In: ISCA '07: Proceedings of the 34th annual international symposium on Computer architecture. New York, NY, USA, pp. 92--103. Published by ACM.

[Chafi et al., 2007]

Hassan Chafi and Jared Casper and Brian D. Carlstrom and Austen McDonald and Chi Cao Minh and Woongki Baek and Christos Kozyrakis and Kunle Olukotun ( 2007).
A Scalable, Non-blocking Approach to Transactional Memory.
In: HPCA. pp. 97-108.

[Wee et al., 2007]

Sewook Wee and Jared Casper and Njuguna Njoroge and Yuriy Teslyar and Daxia Ge and Christos Kozyrakis and Kunle Olukotun ( 2007).
A Practical FPGA-based Framework for Novel CMP Research.
In: FPGA '07: Proceedings of the 2007 ACM/SIGDA 15th International Symposium on Field Programmable Gate Arrays. pp. 116--125. ACM Press, New York, NY, USA.

[Sanchez et al., 2007]

Daniel Sanchez and Luke Yen and Mark D. Hill and Karthikeyan Sankaralingam ( 2007).
Implementing Signatures for Transactional Memory.
In: MICRO '07: Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture. pp. 123--133. Published by IEEE Computer Society.

[Hill et al., 2007]

Mark D. Hill and Derek Hower and Kevin E. Moore and Michael M. Swift and Haris Volos and David A. Wood ( 2007).
A Case for Deconstructing Hardware Transactional Memory Systems.
Technical Report Nr. CS-TR-2007-1594. University of Wisconsin-Madison. Also Dagstuhl Seminar Proceedings 07361.

[Matveev et al., 2007]

Alex Matveev and Ori Shalev and Nir Shavit ( 2007).
Dynamic Identification of Transactional Memory Locations.
Unpublished Manuscript, Tel-Aviv University.

[Titos et al., 2008]

J. Rub\'en Titos and Manuel E. Acacio and Jos\'e M. Garc\'\ia (feb 2008).
Characterization of Conflicts in Log-Based Transactional Memory (LogTM).
In: PDP~'08: Proc. 16th EuroMicro International Conference on Parallel, Distributed, and Network-Based Processing. pp. 30--37.

[Dice et al., 2008]

Dave Dice and Maurice Herlihy and Doug Lea and Yossi Lev and Victor Luchangco and Wayne Mesard and Mark Moir and Kevin Moore and Dan Nussbaum (feb 2008).
Applications of the Adaptive Transactional Memory Test Platform.
In: TRANSACT~'08: 3rd Workshop on Transactional Computing.

[Moir et al., 2008]

Mark Moir and Kevin Moore and Dan Nussbaum (feb 2008).
The Adaptive Transactional Memory Test Platform: A Tool for Experimenting with Transactional Code for Rock.
In: TRANSACT~'08: 3rd Workshop on Transactional Computing.

[Swift et al., 2008]

Michael Swift and Haris Volos and Neelam Goyal and Luke Yen and Mark Hill and David Wood (feb 2008).
OS Support for Virtualizing Hardware Transactional Memory.
In: TRANSACT~'08: 3rd Workshop on Transactional Computing.

[Vallejo et al., 2008]

Enrique Vallejo and Tim Harris and Adri\'an Cristal and Osman S. Unsal and Mateo Valero (feb 2008).
Hybrid Transactional Memory to accelerate safe lock-based transactions.
In: TRANSACT~'08: 3rd Workshop on Transactional Computing.

[Volos et al., 2008]

Haris Volos and Neelam Goyal and Michael Swift (feb 2008).
Pathological Interaction of Locks with Transactional Memory.
In: TRANSACT~'08: 3rd Workshop on Transactional Computing.

[Tuck et al., 2008]

James Tuck and Wonsun Ahn and Luis Ceze and Josep Torrellas (mar 2008).
SoftSig: software-exposed hardware signatures for code analysis and optimization.
In: ASPLOS~'08: Proc. 13th International Conference on Architectural Support for Programming Languages and Operating Systems. pp. 145--156.

[Waliullah and Stenstrom, 2008]

MM Waliullah and Per Stenstrom (April 2008).
Intermediate Checkpointing with Conflicting Access Prediction in Transactional Memory Systems.
In: Proceedings of the 22nd IEEE International Parallel and Distributed Processing Symposium.

[Khan et al., 2008]

Behram Khan and Matthew Horsnell and Ian Rogers and Mikel Lujan and Andrew Dinn and Ian Watson (jun 2008).
A first insight into object-aware hardware transactional memory (brief announcement).
In: SPAA~'08: Proc. 20th Symposium on Parallelism in Algorithms and Architectures. pp. 107--109.

[Lucia et al., 2008]

Brandon Lucia and Joseph Devietti and Karin Strauss and Luis Ceze (Jun 2008).
Atom-Aid: Detecting and Surviving Atomicity Violations.
In: ISCA~'08: Proc. 35th Annual International Symposium on Computer Architecture. pp. 277--288.

[Chung et al., 2008]

JaeWoong Chung and Woongki Baek and Nathan Grasso Bronson and Jiwon Seo and Christos Kozyrakis and Kunle Olukotun (jun 2008).
ASeD: Availability, Security, and Debugging Support using Transactional Memory (poster).
In: SPAA~'08: Proc. 20th Symposium on Parallelism in Algorithms and Architectures. pp. 366--366.

[Kumar et al., 2008]

Sanjeev Kumar and Daehyun Kim and Mikhail Smelyanskiy and Yen-Kuang Chen and Jatin Chhugani and Christopher J. Hughes and Changkyu Kim and Victor W. Lee and Anthony D. Nguyen (Jun 2008).
Atomic Vector Operations on Chip Multiprocessors.
In: Proceedings of the 35th Annual International Symposium on Computer Architecture. pp. 441--452. Published by ACM.

[Baugh et al., 2008]

Lee Baugh and Naveen Neelakantam and Craig Zilles (June 2008).
Using Hardware Memory Protection to Build a High-Performance, Strongly Atomic Hybrid Transactional Memory.
In: Proceedings of the 35th Annual International Symposium on Computer Architecture.

[Bobba et al., 2008]

Jayaram Bobba and Neelam Goyal and Mark D. Hill and Michael M. Swift and David A. Wood (Jun 2008).
TokenTM: Efficient Execution of Large Transactions with Hardware Transactional Memory.
In: Proceedings of the 35th Annual International Symposium on Computer Architecture.

[Shriraman et al., 2008]

Arrvindh Shriraman and Sandhya Dwarkadas and Michael L. Scott (Jun 2008).
Flexible Decoupled Transactional Memory Support.
In: Proceedings of the 35th Annual International Symposium on Computer Architecture.

[Hill, 2008]

Mark D. Hill (Aug 2008).
Is Transactional Memory an Oxymoron?
VLDB Keynote Address.

[Rui et al., 2008]

Guo Rui and Hong An and Ruiling Dou and Ming Cong and Yaobin Wang and Qi Li (Aug 2008).
LogSPoTM: A Scalable Thread Level Speculation Model Based on Transactional Memory.
In: Proc. 13th Asia-Pacific Computer Systems Architecture Conference.

[Drepper, 2008]

Ulrich Drepper (sep 2008).
Parallel Programming with Transactional Memory.
In: Queue, 6(5):38--45.

[Wang et al., 2008]

Shaogang Wang and Dan Wu and Zhengbin Pang and Xiaodong Yang (sep 2008).
Software Assisted Transact Cache to Support Efficient Unbounded Transactional Memory.
In: HPCC~'08: Proc. 10th International Conference on High Performance Computing and Communications. pp. 77--84.

[Rossbach et al., 2008]

Christopher J. Rossbach and Hany E. Ramadan and Owen S. Hofmann and Donald E. Porter and Aditya Bhandari and Emmett Witchel (sep 2008).
TxLinux and MetaTM: transactional memory and the operating system.
In: Communications of the ACM, 51(9):83--91. Earlier versions of this work appeared at ISCA~'07 and SOSP~'07.

[Liu et al., 2008]

Yi Liu and Xin Zhang and He Li and Mingxiu Li and Depei Qian (sep 2008).
Hardware Transactional Memory Supporting I/O Operations within Transactions.
In: HPCC~'08: Proc. 10th International Conference on High Performance Computing and Communications. pp. 85-92.

[Khan et al., 2008]

Behram Khan and Matthew Horsnell and Ian Rogers and Mikel Luj\'an and Andrew Dinn and Ian Watson (sep 2008).
An object-aware hardware transactional memory.
In: HPCC~'08: Proc. 10th International Conference on High Performance Computing and Communications. pp. 93--102.

[Cao Minh et al., 2008]

Chi Cao Minh and JaeWoong Chung and Christos Kozyrakis and Kunle Olukotun (September 2008).
STAMP: Stanford Transactional Applications for Multi-Processing.
In: IISWC '08: Proceedings of The IEEE International Symposium on Workload Characterization.

[Kotselidis et al., 2008]

Christos Kotselidis and Mohammad Ansari and Kim Jarvis and Mikel Luj\'an and Chris C. Kirkham and Ian Watson (sep 2008).
DiSTM: A Software Transactional Memory Framework for Clusters.
In: ICPP~'08: Proc. 37th International Conference on Parallel Processing.

[Pugsley et al., 2008]

Seth H. Pugsley and Manu Awasthi and Niti Madan and Naveen Muralimanohar and Rajeev Balasubramonian (oct 2008).
Scalable and reliable communication for hardware transactional memory.
In: PACT~'08: Proc. 17th international conference on Parallel architectures and compilation techniques. pp. 144--154.

[Lupon et al., 2008]

Marc Lupon and Grigorios Magklis and Antonio Gonz\'alez (oct 2008).
Version management alternatives for hardware transactional memory.
In: MEDEA~'08: Proceedings of the 9th workshop on MEmory performance.

[Lev and Maessen, 2008]

Yossi Lev and Jan-Willem Maessen ( 2008).
Split hardware transactions: true nesting of transactions using best-effort hardware transactional memory.
In: PPoPP '08: Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming. New York, NY, USA, pp. 197--206. Published by ACM.

[Yen et al., 2008]

Luke Yen and Stark C. Draper and Mark D. Hill ( 2008).
Notary: Hardware techniques to enhance signatures.
In: MICRO '08: Proceedings of the 2008 41st IEEE/ACM International Symposium on Microarchitecture. pp. 234--245. Published by IEEE Computer Society.

[Ramadan et al., 2008]

Hany E. Ramadan and Christopher J. Rossbach and Emmett Witchel ( 2008).
Dependence-aware transactional memory for increased concurrency.
In: MICRO '08: Proceedings of the 2008 41st IEEE/ACM International Symposium on Microarchitecture. pp. 246--257. Published by IEEE Computer Society.

[Guerraoui and Kapalka, 2008]

Rachid Guerraoui and Michal Kapalka ( 2008).
On the Correctness of Transactional Memory.
In: Proceedings of the 13th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP'08).

[Aydonat and Abdelrahman, 2009]

Utku Aydonat and Tarek Abdelrahman (feb 2009).
Hardware support for serializable transaction: a study of feasibility and performance.
In: TRANSACT~'09: 4th Workshop on Transactional Computing.

[Hofmann et al., 2009]

Owen S. Hofmann and Christopher J. Rossbach and Emmett Witchel (mar 2009).
Maximum benefit from a minimal HTM.
In: ASPLOS '09: Proceeding of the 14th international conference on Architectural support for programming languages and operating systems. pp. 145--156. Published by ACM.

[Dice et al., 2009]

Dave Dice and Yossi Lev and Mark Moir and Daniel Nussbaum (mar 2009).
Early experience with a commercial hardware transactional memory implementation.
:157--168.

[Boehm, 2009]

Hans-J. Boehm (mar 2009).
Transactional Memory Should Be an Implementation Technique, Not a Programming Interface.
In: HotPar~'09: Proc. 1st Workshop on Hot Topics in Parallelism.

[Shriraman et al., 2009]

Arrvindh Shriraman and Sandhya Dwarkadas and Michael L. Scott (apr 2009).
Tapping into Parallelism with Transactional Memory.
In: The USENIX Magazine, 34(2):12--23.

[Pant and Byrd, 2009]

Salil Pant and Gregory Byrd (may 2009).
Extending concurrency of transactional memory programs by using value prediction.
In: CF~'09: Proc. 6th ACM conference on Computing frontiers. pp. 11--20.

[Gupta et al., 2009]

Shantanu Gupta and Florin Sultan and Srihari Cadambi and Franjo Ivancic and Martin Rotteler (may 2009).
Using hardware transactional memory for data race detection.
In: IPDPS~'09: Proc. 23rd International Parallel and Distributed Processing Symposium.

[Sanyal et al., 2009]

Sutirtha Sanyal and Sourav Roy and Adri\'an Cristal and Osman S. Unsal and Mateo Valero (may 2009).
Clock gate on abort: Towards energy-efficient hardware Transactional Memory.
In: HPPAC~'09: Proc. 5th Workshop on High-Performance, Power-Aware Computing.

[Titos et al., 2009]

Rub\'en Titos and Manuel E. Acacio and Jose M. Garcia (may 2009).
Speculation-based conflict resolution in hardware transactional memory.
In: IPDPS~'09: Proc. 23rd International Parallel and Distributed Processing Symposium.

[Wang et al., 2009]

Ruibo Wang and Kai Lu and Xicheng Lu (jun 2009).
Investigating transactional memory performance on ccNUMA machines.
In: HPDC~'09: Proc. of the 18th ACM international symposium on High performance distributed computing. pp. 67--68.

[Chung et al., 2009]

JaeWoong Chung and Woongki Baek and Christos Kozyrakis (jun 2009).
Fast memory snapshot for concurrent programming without synchronization.
In: ICS~'09: Proc. 23rd international conference on Supercomputing. pp. 117--125.

[Gajinov et al., 2009]

Vladimir Gajinov and Ferad Zyulkyarov and Osman S. Unsal and Adri\'an Cristal and Eduard Ayguad\'e and Tim Harris and Mateo Valero (jun 2009).
QuakeTM: parallelizing a complex sequential application using transactional memory.
In: ICS~'09: Proc. 23rd international conference on Supercomputing. pp. 126--135.

[Shriraman and Dwarkadas, 2009]

Arrvindh Shriraman and Sandhya Dwarkadas (jun 2009).
Refereeing conflicts in hardware transactional memory.
In: ICS~'09: Proc. 23rd international conference on Supercomputing. pp. 136--146. Also available as TR 939, Department of Computer Science, University of Rochester, September 2008.

[Xekalakis et al., 2009]

Polychronis Xekalakis and Nikolas Ioannou and Marcelo Cintra (jun 2009).
Combining thread level speculation helper threads and runahead execution.
In: ICS~'09: Proc. 23rd international conference on Supercomputing. pp. 410--420.

[Pant and Byrd, 2009]

Salil Pant and Gregory Byrd (jun 2009).
Limited early value communication to improve performance of transactional memory.
In: ICS~'09: Proc. 23rd international conference on Supercomputing. pp. 421--429.

[Sanyal et al., 2009]

Sutirtha Sanyal and Adri\'an Cristal and Osman S. Unsal and Mateo Valero and Sourav Roy (jun 2009).
Dynamically Filtering Thread-Local Variables in Lazy-Lazy Hardware Transactional Memory.
In: HPCC~'09: Proc. 11th Conference on High Performance Computing and Communications.

[Hossain et al., 2009]

Hemayet Hossain and Sandhya Dwarkadas and Michael C. Huang (sep 2009).
DDCache: Decoupled and Delegable Cache Data and Metadata.
In: PACT~'09: Proc. 18th International Conference on Parallel Architectures and Compilation Techniques.

[Lupon et al., 2009]

Marc Lupon and Grigorios Magklis and Antonio Gonz\'alez (sep 2009).
FASTM: A Log-based Hardware Transactional Memory with Fast Abort Recovery.
In: PACT~'09: Proc. 18th International Conference on ParallelArchitectures and Compilation Techniques.

[Lupon et al., 2009]

[Nikas et al., 2009]

Konstantinos Nikas and Nikos Anastopoulos and Georgios Goumas and Nektarios Koziris (sep 2009).
Employing Transactional Memory and Helper Threads to Speedup Dijkstra's Algorithm.
In: ICPP~'09: Proc. 38th International Conference on Parallel Processing.

[Pankratius et al., 2009]

Victor Pankratius and Ali-Reza Adl-Tabatabai and Frank Otto (sep 2009).
Does Transactional Memory Keep Its Promises? Results from an Empirical Studynumber = 2009-12.
Technical Report. IPD, University of Karlsruhe, Germany.

[Porter et al., 2009]

Leo Porter and Bumyong Choi and Dean Tullsen (sep 2009).
Mapping Out a Path from Hardware Transactional Memory to Speculative Multithreading.
In: PACT~'09: Proc. 18th International Conference on Parallel Architectures and Compilation Techniques.

[Quislant et al., 2009]

Ricardo Quislant and Eladio Gutierrez and Oscar. Plata (sep 2009).
Improving Signatures by Locality Exploitation for Transactional Memory.
In: PACT~'09: Proc. 18th International Conference on Parallel Architectures and Compilation Techniques.

[Shaogang et al., 2009]

Wang Shaogang and Dan Wu and Zhengbin Pang and Xiaodong Yang (sep 2009).
DTM: Decoupled Hardware Transactional Memory To Support Unbounded Transaction and Operating System.
In: ICPP~'09: Proc. 38th International Conference on Parallel Processing.

[Ahn et al., 2009]

Wonsun Ahn and Shanxiang Qi and Jae-Woo Lee and Marios Nicolaides and Xing Fang and Josep Torrellas and David Wong and Samuel Midkiff (Dec 2009).
BulkCompiler: High-Performance Sequential Consistency through Cooperative Compiler and Hardware Support.
In: Proceedings of the 42nd International Symposium on Microarchitecture.

[Chaudhry et al., 2009]

Shailender Chaudhry and Robert Cypher and Magnus Ekman and Martin Karlsson and Anders Landin and Sherman Yip and H\rakan Zeffer and Marc Tremblay ( 2009).
Rock: A High-Performance Sparc CMT Processor.
In: IEEE Micro, 29(2):6-16.

[Blake et al., 2009]

Geoffrey Blake and Ronald G. Dreslinski and Trevor Mudge ( 2009).
Proactive transaction scheduling for contention management.
In: Micro-42: Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture. New York, NY, USA, pp. 156--167. Published by ACM.

[Chaudhry et al., 2009]

Shailender Chaudhry and Robert Cypher and Magnus Ekman and Martin Karlsson and Anders Landin and Sherman Yip and H\aakan Zeffer and Marc Tremblay ( 2009).
Simultaneous speculative threading: a novel pipeline architecture implemented in sun's rock processor.
In: ISCA~'09: Proc. 36th annual International Symposium on Computer Architecture. pp. 484--495.

[Tomic et al., 2009]

Sasa Tomic and Cristian Perfumo and Chinmay Kulkarni and Adria Armejach and Adri\'an Cristal and Osman Unsal and Tim Harris and Mateo Valero ( 2009).
EazyHTM: Eager-Lazy Hardware Transactional Memory.
In: MICRO '09: Proceedings of the 2009 42nd IEEE/ACM International Symposium on Microarchitecture.

[Porter and Witchel, 2010]

Donald E. Porter and Emmett Witchel (March 2010).
Understanding Transactional Memory Performance.
In: Proceedings of the 2010 IEEE International Symposium on Performance Analysis of Software Systems. pp. 97--108.